Beyer, S. and Jacobi, C. and Kröning, D. and Leinenbach, D. and Paul, W.J.
Putting it all together - Formal Verification of the VAMP.
In STTT Journal, Special Issue on Recent Advances in Hardware
Verification, Volume 8, Number 4-5,
Springer, pages 411-430, August 2006.
Ayewah, N. and Beyer, S. and Kikkeri, N. and Seidel, P.-M.
Challenges in the Formal Verification of Complete State-of-the-Art Processors.
In International Conference on Computer Design, San Jose, 2005, IEEE, pages 603-606
Beyer, S. and Böhm, P. and Gerke, M. and Hillebrand, M. and In der Rieden, T. and Knapp, S. and Leinenbach, D. and Paul, W.J.
Towards the Formal Verification of Lower System Layers in Automotive Systems.
In International Conference of Computer Design, San Jose, 2005, IEEE, pages 317-324
Beyer, Sven. Putting it all together - Formal Verification of the VAMP.
PhD thesis, Saarland University, Saarbrücken, 2005. PDF
Beyer, S. and Jacobi, C. and Kröning, D. and Leinenbach, D. and Paul, W.J.
Instantiating uninterpreted functional units and memory system: functional verification of the VAMP.
In Geist, D. and Tronci, E., editors, CHARME 2003,
volume 2860 of LNCS, pages 51-65, Springer, 2003.
Berg, C. and Beyer, S. and Jacobi, C. and Kröning, D. and Leinenbach, D.
Formal Verification of the VAMP Microprocessor (Project Status).
In Charatonik, Witold and Ganzinger, Harald, editors, Symposium on the Effectiveness of Logic in Computer Science (ELICS02),
pages 31-36, Max-Planck-Institut für Informatik, 2002.
Beyer, S. and Jacobi, C. and Kroening, D. and Leinenbach, D.
Correct Hardware by Synthesis from PVS.
2002. unpublished, available at http://www-wjp.cs.uni-sb.de/publikationen/BJKL02.pdf.
Beyer, Sven. Entwurf einer PCI-Karte als Schnittstelle zwischen SB-PRAM und PC.
Master's Thesis, Universität des Saarlandes, 2000. PDF